Science News

Maskless chips

Sun, 16th Jan 2011

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A quicker cheaper way of making computer chips has been developed.

Integrated circuits, or silicon chips are now an absolutely critical part of our everyday life they are so cheap that it can make sense to put a computer into a juggling ball, but they are only cheap if they are made by the million, so most problems are solved with general purpose processors. These are great but they can be hundreds of times slower and less power efficient than custom circuits.

Integrated circuit chipYou make a silicon chip by making a mask with a pattern on it, then using UV light, photographically transferring this pattern onto a layer of plastic the chip and then etching away some of the silicon where the plastic has been removed. Different materials are added onto the silicon and then etched away up to 30 times, and you end up with a working chip. The problem is that the masks, a set can cost up to $3 million which means that if you only want a few thousand chips they cost a complete fortune, plus of course if you make a mistake in making the mask it is very very expensive.

One alternative that has existed for a long time is to get rid of the mask completely and use an electron beam to write directly onto the plastic, but this is very very slow as there can be a billion transistors on a modern chip. Engineers working for KLA-Tencor have developed a system which instead of using one beam uses up to a million at once. They send a beam of electrons at a special chip covered in pixels that can be programmed to be transparent or act as a mirror to these electrons. They then focus the reflected beams onto the plastic on the silicon. They then move the beam around and paint the whole chip. They are aiming to be able to make a whole 15inch wafer in less than 10 mins.

This is unlikely to compete with photolithography for large quantitity production but for research and specialist applications such as the military it could be very economic.



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I have not heard of this technique and KLA-Tencor do not really make equipment exactly in this area (although related to semiconductor manufacture) so this is a bit surprising. They also do not make a mention of this on their website - at least not that I could find. I note the article says they can make a whole 15" wafer in 10 minutes. This is hugely misleading; they may be able to do some patterning in this time but this will only be for 1 mask level. There will be another 30+ mask steps and some lengthy processing in between each masking stage some of which takes many hours. Anyway, the object is not to shorten the overall processing time, but to save on the expensive mask costs whilst not unduly lengthening the processing time.

If they are referring to 15" wafers, they presumably are making this a very high resolution system; say below 65nm feature size. I doubt anyone using older technology than this would be getting close to 15" wafers yet. I have to say I am a little skeptical that this is a real, practical methodology, though I have no specific theoretical objection and, if it really works, would be a good idea. I remember ES2 and the much heralded ebeam direct-write prototyping scheme. They raised a good deal of money on the back of this technique though, in practice, the service they provided often used conventional masking. I would ask for a lot of detail before I would think of investing!! graham.d, Fri, 21st Jan 2011

So they basically have reinvented the first mass produced silicon memory - the mask ROM. SeanB, Fri, 21st Jan 2011

Here's another overview of the process.

I get the impression their aim is to provide a rapid-prototyping system without masks by using a sort of multi-pixel electronic shutter. That certainly would be very useful if they can pull it off.

However, as masks would still have to be produced to manufacture the devices in high volume, they'll have to demonstrate that no re-engineering of the device is required to go from the maskless process to a masked process. I have vivid memories of fiascos involving gate arrays that were supposed to reduce time-to-market that ended up having quite the opposite effect.

Geezer, Fri, 21st Jan 2011

Ta Geezer, that was a much better description in the reference you gave. I think the basic idea is sound technically; the overhead of mask costs at the finer geometries is prohibitive unless you are very sure of your market and require very high volumes. It is the business I'm in so I know the risks involved. Basically, when you complete a design you end up with all the layout data for the chip in viewable layers on the screen of a computer. Much of the layout is routed automatically (at least for digital) and all the layout is checked for Design Rule Errors (DRC) and the layout verified against the tested design database (only partially schematics nowadays) (LVS) and this in turn will have been verified by simulation at various levels. The procedure is that when the design is complete and verified as well as possible (which is never 100% unfortunately) the layout database is used to produce the masks that are needed to produce the devices. Instead of making the masks the same dat can be used to drive an ebeam writing gizmo directly. If the design needs changing you normally need to make another set of the expensive masks but, in this case, you use the data to drive the gizmo woth the new pattern instead. The reason masks are expensive is because the mask making machines are expensive but you only use them once and re-use the mask multiple times. In this case you tie up the ebeam gizmo a lot in making each wafer; I don't suppose it will be cheap. The economics are not obvious when you go into it. It does save the cost of some equipment so may be cost effective for small volume production though, as I implied before, I would need to be convinced.

They can use this to pattern every level I assume, Sean, so it need not be restricted to a single level masked ROM. It would certainlly be most efficient if used on a coventionally masked gate array (made in high volume) so as just to pattern the metal and via layers though. It will be interesting to see if it takes off or if it attracts significant investment. graham.d, Fri, 21st Jan 2011

Does that really happen? waiting for it coming true. jennyjuan, Sat, 22nd Jan 2011

"Nanowriter will enable affordable and timely production of state-of-the art ICs in small lots entirely within secure facilities."

I think this might explain why the US government (through DARPA) is investing in it.
Geezer, Sat, 22nd Jan 2011

I'm afraid to say that the US government does not always make sensible investments. They often back a lot of horses in a race because they have the money. There are also often political forces and, dare I say it, influencial beneficiaries involved. I note the investment is in an Isreali company for example so helps in providing "legitimate" funding.

ASs an aside, I also have a slightly tarnished view here as someone who lost a large chunk of money investing in an Israeli semiconductor venture where the directors made a lot of money but the smaller startup investors lost everything; and, it seems, all quite legally.

Does what really happen, Jenny? I didn't understand your question. graham.d, Sat, 22nd Jan 2011

I have a similarly jaundiced view of senior managers using their public corporations as personal cash registers. Ah, the stories I could tell (if I could afford to get sued  ). Geezer, Sat, 22nd Jan 2011

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