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Offline Variola

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« Reply #50 on: 25/08/2009 11:11:03 »
It's Mistress H to you Nizzle..  :P

Did you know that approx 1.5kg of your body weight made up of bacteria alone.
 

lyner

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« Reply #51 on: 25/08/2009 11:45:53 »
Did you know it's impossible to guarantee that an asynchronous binary input to a synchronous system will always be interpreted as either a "one" or a "zero".

(Think about it the next time you get on a fly-by-wire aircraft.)  :o
Could you explain please?
I find it hard to imagine how the data value could be other than 1 or 0 - albeit wrong - when the ciruitry is bi-state.
 

Offline DrChemistry

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« Reply #52 on: 25/08/2009 13:00:22 »
Did you know there is a species of Foxes called Zorros?
 

Offline Nizzle

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« Reply #53 on: 25/08/2009 13:50:49 »
Did you know that zorro is spanish for fox? :P
 

Offline Mazurka

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« Reply #54 on: 25/08/2009 14:04:10 »
Did you know Champion the Wonder Horse? [:o)]
 

Offline Geezer

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« Reply #55 on: 25/08/2009 17:07:04 »
Did you know it's impossible to guarantee that an asynchronous binary input to a synchronous system will always be interpreted as either a "one" or a "zero".

(Think about it the next time you get on a fly-by-wire aircraft.)  :o
Could you explain please?
I find it hard to imagine how the data value could be other than 1 or 0 - albeit wrong - when the circuitry is bi-state.
"Flip-flops" are indeed bistable. They all rely on positive feedback to operate, so they can also be thought of as rather unstable amplifiers.

In a synchronous system, all the state changes are synchronized, and all signals are have time to propagate and settle at a binary level before the next clock (there can be exceptions to this, but that's the situation the designer would like to achieve.)

So far so good. Now, external events are asynchronous relative to our synchronous system, so an input from the "outside world" can change at any time. There are lots of circuits to synchronize incoming signals, but they all boil down to a method of sampling the incoming asynchronous signal with the clock in the synchronous system and storing the value in a flip-flop.

All is well as long as the asynchronous input does not change during a small time "window" relative to the synchronous clock. In that event, the flip-flop is metastable, in other words, its outputs are indeterminate. Now, typically, because the metastable state (The Grand Old Duke of York had something to do with this btw) is highly unstable because it has a large amount of gain, the flip-flop heads one way or the other rather quickly, so again, all is well.

However, there is a very small time window that can result in the metastable condition lasting rather a long time, which can confuse the "downstream logic".

Still, not to worry. The designer will typically put a second synchronizer behind the first, so that there is a very high probability that the output of the first synchronizer does not violate the "window" of the second synchronizer. However, there is no way to guarantee that the first synchronizer won't violate the window of the second synchronizer.

The second synchronizer does greatly reduce the probability of a "gotcha", and you can always add a third which reduces further still.

In practice, the idea is to make the probability so low that other hard and soft errors (which cannot be eliminated) have a much higher probability of occurrence. All systems are (or should be!) designed to recover from errors, even if it's just a case of hitting the reset button.

So, digital systems may be quite a bit more analogy than we think. And, it's getting worse. The clock speeds of modern chips are so fast, that you have to treat a lot of the internal signals as asynchronous, even though they all derive from the same clock source.

Aaarrrrggg!
« Last Edit: 25/08/2009 17:08:49 by Geezer »
 

Offline graham.d

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« Reply #56 on: 25/08/2009 17:37:24 »
Absolutely, Geezer, and indeed I have seen designs fail because of synchronicity failure. Generally speaking if you add a further synchroniser you can get the failure rate down quite low but, as you say, with high speed systems the chance of failure is higher and with more complex systems there are more things happening so again more chance of failure. It can be hard to convince the uninitiated about this.

Many parts of a digital system can be made fully synchronous but few can be completely so. Interestingly, a very, very major manufacturer of processers used to not to fully appreciate the problems of synchronicity failure (at least in one of their design groups) until it was pointed out to them. I had better not say which company!
 

Offline Geezer

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« Reply #57 on: 25/08/2009 18:12:34 »
Oh yes! I've been on projects where millions went up in smoke because an engineer relied on the simulation tools too much. They don't always catch these problems. Even worse, because it's a statistical event, the problem only emerges slowly, and only after you've made thousands and thousands of chips and put them in the field. Lab testing is unlikely to surface the problem.

Then you get the phone call in the middle of the night from the chairman of some gigantic corporation wanting to know what you're going to do about it! Sheesh, I'm glad I retired.
« Last Edit: 25/08/2009 18:16:56 by Geezer »
 

lyner

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« Reply #58 on: 25/08/2009 22:58:48 »
Did you know it's impossible to guarantee that an asynchronous binary input to a synchronous system will always be interpreted as either a "one" or a "zero".

(Think about it the next time you get on a fly-by-wire aircraft.)  :o
Could you explain please?
I find it hard to imagine how the data value could be other than 1 or 0 - albeit wrong - when the ciruitry is bi-state.
I hate (no I love it) to be pedantic but your later explanation tells us about the possible ways in which the output of a fast and not well synchronised logic circuit element can produce non-logic levels. This is true. Any logic technology, working near its limit, produces analog waveforms and, to reduce errors, synchronous systems were developed in which a clock waveform chooses the most reliable time (in the eye) to determine the logic value. To get the timing right in circuits working at GHz speeds, the lengths of leads need to be correct within a few mm, to reduce timing problems.
BUT you used the word "interpreted" and that implies that somewhere along the line, there was a circuit which "interpreted" the signal (possibly wrongly) and acted upon a logic value -   either a 1 or a 0. Strictly, that would be the point at which the signal was interpreted.
 

Offline Geezer

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« Reply #59 on: 25/08/2009 23:30:55 »
The circuits are all digital. I'm not discussing a case where the clock rate exceeds the speed of the silicon technology employed. In the case of large chips, because the chips are quite large and the clock speeds are so fast, the signals can't always propagate to other areas of the chip to satisfy required setup times. In other words, one clock time is insufficient. This means the signal has to be resynchronized. If it isn't, the receiving stage can go metastable, and create all kinds of problems downstream.

I'm quite confident the processor in your PC has to deal with this situation in many areas of its design.

I don't understand your point re. "interpreted".
 

lyner

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« Reply #60 on: 25/08/2009 23:53:39 »
Re "interpreted". I agree with what you say about the analog practicalities of digital circuits; even at speeds well within the operating limits of any logic, the waveforms look nothing like boxcars.
What I mean is that, the analog values in any electronic circuit could be measured with an oscilloscope but that would not be an 'interpretation' of the value. (Timing hazards are also a common problem, which is why synchronous logic needed to be developed.) But, at some point in the system, a decision is made about one of the bits in a decimal digit or the state of a lamp (on / off).  I should say that is where the 'interpretation' of the logic value has taken place to produce that state. An 'ideal' signal has been assumed and distortion / noise / hooting and ringing have been interpreted as Errors. Even earlier, in the very first element of combinational logic, an output is produced which cannot be 2/3 or 5/16 - the design and operation of the logic must be based on a hard decision. A OR B cannot produce a Q which is anything other than 1 or 0 or the machine just doesn't work; it's not a functioning binary logic circuit.
Does that distinction make sense to you?
The above doesn't apply to a multi level or soft logic system, of course, but you were referring to a binary syste,m.
 

Offline Geezer

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« Reply #61 on: 26/08/2009 00:43:33 »
OK. I think I understand.

Well, actually it is a case where A (some operation) B = Z!

You can actually set up an experiment to observe it.

Take a common or garden D flip-flop. 74XX74 for example

Hook it's D input to one clock source and it's Clock input to another source. One of the clocks needs to be adjustable. Put scope probes on D, C and Q. Trigger on C.
Now adjust the clock so that it beats very slowly with the other clock.

Occasionally you will observe a faint trace where the Q output "hangs around" at a level that neither represents one or zero for an interval that is much greater than the propagation delay through the flip-flop. That's the metastable condition. It's neither up nor down! Empirically, faster technologies display shorter metastable intervals, but you really don't know how long they could  last.

The chip manufacturers only guarantee the behavior of a device if you satisfy the setup and hold times for the inputs. If you violate them, they make no claims about what will happen and how long the metastable condition will last.
 

Offline Nizzle

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« Reply #62 on: 26/08/2009 07:46:56 »
Did you know it's not nice to hijack topics?
 

Offline DrChemistry

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« Reply #63 on: 26/08/2009 08:59:30 »
Did you know Albert Einstein was an excellent violinist?
 

lyner

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« Reply #64 on: 26/08/2009 09:13:43 »
I know that Albert could play the violin better than Sherlock Holmes. Dunno about "excellent".
I also reckon that he would have been interested in logic states within circuits.
This (you refer to hijacking)  is always a risk with a thread which tries to be a forum in forum. Perhaps we should have a breakout after three posts rule? But wouldn't that be a Just Chat thread?
 

Offline DrChemistry

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« Reply #65 on: 26/08/2009 09:27:24 »
I know that Albert could play the violin better than Sherlock Holmes. Dunno about "excellent".

He was, in all case, a better violinist than I was. :)
 

lyner

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« Reply #66 on: 26/08/2009 11:11:23 »
"Was"?
Are you improving then?
 

Offline DrChemistry

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« Reply #67 on: 26/08/2009 12:07:36 »
No. Mine was a rent. Couldn't afford to buy it at that time.
 

Offline Variola

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« Reply #68 on: 26/08/2009 12:17:35 »
Did you know it's not nice to hijack topics?

Did you know that STB is preferable to just hijacking?? ;D

http://www.thenakedscientists.com/forum/index.php?topic=19703.0

 

lyner

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« Reply #69 on: 26/08/2009 13:56:22 »
What has a Set Top Box got to do with this thread?
I've been out-acronymed.
 

Offline Geezer

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« Reply #70 on: 26/08/2009 16:18:15 »
Did you know it's not nice to hijack topics?

Quite right! We should have started a new thread.  [B)]
« Last Edit: 26/08/2009 17:36:44 by Geezer »
 

lyner

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« Reply #71 on: 26/08/2009 17:13:34 »
Support Training Battalion ???

Give us a clue.
 

Offline Variola

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« Reply #72 on: 26/08/2009 17:48:28 »
Support Training Battalion ???

Give us a clue.



Errrr the clue was in the link posted along with my comment SC!
 

Offline Geezer

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« Reply #73 on: 26/08/2009 17:50:44 »
Did you know NSF stands for Naked Science Forum AND National Science Foundation?

(I think they should change their name to avoid confusuion)
 

Offline Variola

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« Reply #74 on: 26/08/2009 17:51:52 »
Did you know NSF stands for Naked Science Forum AND National Science Foundation?

(I think they should change their name to avoid confusuion)

It also stands for Naughty Sexy Frillies...
 

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« Reply #74 on: 26/08/2009 17:51:52 »

 

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